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Multi-level stencils solve component co-planarity problems

Multi-level stencils solve component co-planarity problems
Electronic components with mechanically formed leads continue to cause problems as their poor lead co-planarity regularly results in inconsistent solder fillets and open circuits. Tecan offers optimised multi-level stencils which can solve these problems - at a stroke.

"When printing solder paste onto PCBs, it is crucially important for the thickness of the stencil to be optimised to deliver the appropriate volume of paste required by all the components present on the PCB, said Tony Weldon, stencil manager, Tecan. "Unfortunately, many attempts employing a single thickness stencil, in the hope that an average paste thickness suits all the components on the board, often limits the success of the process itself. Some engineers select the Stencil thickness solely to ensure better paste release for the finest pitch components but this ignores completely the individual requirements of larger components and particularly those with poor co-planarity.

"All too often there is recognition, even before the paste is printed, of the manufacturing issues involved; including the adverse impact that re-work has on the success of the surface mount process. However, recognition is an observation whereas resolution requires action. We believe that these problems cannot always be solved using a single-thickness stencil.

"To solve these problems at a stroke we can supply stencils with local thickness variations across its surface to ensure appropriate solder deposits result on each component pad - radically reducing or even eliminating these problems. We call it 'stick-or-bust' - why gamble on the outcome when you can assure it? Why not deal yourself a better hand and obtain an optimised stencil solution for the application at the outset to eliminate these problems, improve overall quality and reduce rework costs."

Typical components which cause the problems are primarily J-leg devices, surface-mount connectors, ceramic BGA's and power components. The main issue is that solder paste although 88-93% metal by weight is only 50% metal by volume - so that following reflow of a 120µ paste deposit only 60µ of the original deposit remains as metal. Often the specified lead co-planarity tolerances of ± 0.050mm are exceeded and therefore if the paste deposit is not sufficient in the first place and a poor joint may result. These problems can be exacerbated in lead-free process because the pastes exhibit noticeably poorer wetting by comparison and the PCB's will experience increased temperatures. Tecan has developed a worldwide reputation for its in-depth understanding of the print process and cites appropriate paste volume as crucial to success. It sees its multi-level stencils as optimised 'volume matching' solutions which can readily deliver the necessary paste to a conflicting range of component types on a single PCB, even those where lead co-planarity may occur.

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